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uop-editor

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"use strict"; Object.defineProperty(exports, "__esModule", { value: true }); exports.LONGEST_NAME = exports.STATE_NAMES = exports.NAMES = void 0; exports.NAMES = [ "IRD", "J6", "J5", "J4", "J3", "J2", "J1", "J0", "LD.PC", "LD.MAR", "LD.MDR", "LD.IR", "LD.REG", "LD.BEN", "GatePC", "GateMAR", "GateMDR", "GateALUSHF", "GateRS2", "PCMUX", "ADDR1MUX", "(Empty)", "ADDR2MUX", "(Empty)", "MARMUX", "MDRMUX", "RS2MUX", "RS2En", "RS1En", "MIO_EN", "WE", "DATASIZE", "RESET" ]; exports.STATE_NAMES = new Map(); exports.STATE_NAMES.set(0, "MAR <- PC; PC <- PC + 4"); exports.STATE_NAMES.set(37, exports.STATE_NAMES.get(0)); exports.STATE_NAMES.set(1, "MDR <- MEMORY[MAR]"); exports.STATE_NAMES.set(5, "IR <- MDR"); exports.STATE_NAMES.set(7, "IR[6:0]"); exports.STATE_NAMES.set(19, "rd <- rs1 op imm12 (I-Type)"); exports.STATE_NAMES.set(51, "rd <- rs1 op rs2 (R-Type)"); exports.STATE_NAMES.set(99, "Compare (B-Type)"); exports.STATE_NAMES.set(100, "Set LD.BEN (LD.BEN = 1)"); exports.STATE_NAMES.set(96, "B = 0; MAR <- PC; PC <- PC + 4"); exports.STATE_NAMES.set(104, "PC <- Branch's PC + imm12"); exports.STATE_NAMES.set(3, "MAR <- load address (lb, lh, lw)"); exports.STATE_NAMES.set(2, "MDR <- Memory[MAR]"); exports.STATE_NAMES.set(6, "rd <- MDR"); exports.STATE_NAMES.set(35, "MAR <- store address (sb, sh, sw)"); exports.STATE_NAMES.set(32, "MDR <- rs2"); exports.STATE_NAMES.set(33, "Memory[MAR] <- MDR"); exports.STATE_NAMES.set(55, "Set MARMUX (MARMUX = 1) (lui)"); exports.STATE_NAMES.set(111, "rd <- PC + 4 (jal)"); exports.STATE_NAMES.set(112, "PC <- JAL's PC + imm20"); exports.STATE_NAMES.set(103, "rd <- PC + 4 (jalr)"); exports.STATE_NAMES.set(102, "PC <- rs1 + imm12"); exports.LONGEST_NAME = 10;