teroshdl/test/templates/examples/vhdl/instance_vhdl_2008.txt

Backend for terosHDL IDE

arith_counter_gray_inst : entity work.arith_counter_gray
  generic map (
    BITS => BITS,
    INIT => INIT
  )
  port map (
    clk => clk,
    rst => rst,
    inc => inc,
    dec => dec,
    val => val,
    cry => cry
  );