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microvium

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A compact, embeddable scripting engine for microcontrollers for executing small scripts written in a subset of JavaScript.

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"use strict"; /* Microvium categorizes operations into groups based on common features. The first nibble of an instruction is its vm_TeOpcode. This is followed by 4 bits which can either be interpreted as a data parameter or as another opcode (e.g. vm_TeOpcodeEx1). I call the first nibble the "primary opcode" and the second nibble is the "secondary opcode". There are a number of possible secondary opcodes, and each group has common preparation logic across the group. Preparation logic means the code that runs before the operation. For example, many operations require popping a value off the stack before operating on the value. The VM implementation is more compact if the pop code is common to all instructions that do the pop. Operations can have different "follow through" logic grouped arbitrarily, since the implementation of all instructions requires a "jump", those that have common follow through logic simply jump to the same follow through without additional cost, which eventually lands up back at the loop start. So the instruction grouping does not need to cater for follow through logic, only preparation logic. To keep operation commonality as seamlessly as possible, the VM implementation use 16-bit "registers", which have overloaded meaning depending on the context: - `reg1` - Initially holds the zero-extended 4-bit secondary nibble - Operations that load an 8- or 16-bit literal will overwrite `reg1` with the literal. - "Pure" operations use reg1 as the first popped operand (none of the pure operations have an embedded literal). "Pure" are what I'm calling operations whose entire effect is to pop some operands off the stack, operate on them, and push a result back onto the stack. For example, `ADD`. - `reg1` is also used as the "result" value for the common push-result tail logic - `reg2` - used as the second popped value of binary operations - used as the value to store, store-like operations - `reg3` - can be used arbitrarily by operations and does not have a common meaning Additionally, the number operations have variations that work on 32 or 64 bit values. These have their own local/ephemeral registers: - `reg1I`: the value of the reg1 register unpacked to a `uint32_t` - `reg2I`: the value of the reg2 register unpacked to a `uint32_t` - `reg1F`: the value of the reg1 register unpacked to a `double` - `reg2F`: the value of the reg2 register unpacked to a `double` Operation groups and their corresponding preparation logic - vm_TeOpcodeEx1: - The prep does not read a literal (all these instructions are single-byte). - The prep pops 0, 1, or 2 values from the stack depending on the instruction range - vm_TeOpcodeEx2: - Prep reads 8-bit literal into reg1 - Two separate instruction ranges specify whether to sign extend or not. - Two instruction ranges specify whether the prep will also pop an arg into reg2. - vm_TeOpcodeEx3: - Prep reads a 16-bit value from byte stream into reg1. This can be interpreted as either signed or unsigned by the particular instruction. - A sub-range within the instruction specifies whether an argument is popped from the stack. - (Edit: there are violations of this pattern because I ran out space in vm_TeOpcodeEx1) - vm_TeNumberOp: - These are all dual-implementation instructions which have both 32 and 64 bit implementations. - Prep pops one or two values off the stack and reads them into reg1 and reg2 respectively. The choice of 1 or 2 depends on the sub-range. If popping one value, the second is left as zero. - Prep unpacks to either int32 or float64 depending on the corresponding data types. - The operations can dispatch to a different tail/follow through routine depending on whether they overflow or not. - vm_TeBitwiseOp: - These operations all operate on 32-bit integers and produce 32-bit integer results. - Prep pops one or two values off the stack and reads them into reg1 and reg2 respectively. The choice of 1 or 2 depends on the sub-range. If popping one value, the second is left as zero. - Prep unpacks reg1 and reg2 to int32 Follow-through/tail routines: - Push float (reg1F) - Push int32 (reg1I) - Push 16-bit result (reg1) */ Object.defineProperty(exports, "__esModule", { value: true }); exports.vm_TeSmallLiteralValue = exports.vm_TeBitwiseOp = exports.vm_TeNumberOp = exports.vm_TeOpcodeEx4 = exports.vm_TeOpcodeEx3 = exports.vm_TeOpcodeEx2 = exports.vm_TeOpcodeEx1 = exports.vm_TeOpcode = void 0; // 4-bit enum var vm_TeOpcode; (function (vm_TeOpcode) { vm_TeOpcode[vm_TeOpcode["VM_OP_LOAD_SMALL_LITERAL"] = 0] = "VM_OP_LOAD_SMALL_LITERAL"; vm_TeOpcode[vm_TeOpcode["VM_OP_LOAD_VAR_1"] = 1] = "VM_OP_LOAD_VAR_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_LOAD_SCOPED_1"] = 2] = "VM_OP_LOAD_SCOPED_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_LOAD_ARG_1"] = 3] = "VM_OP_LOAD_ARG_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_CALL_1"] = 4] = "VM_OP_CALL_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_FIXED_ARRAY_NEW_1"] = 5] = "VM_OP_FIXED_ARRAY_NEW_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_EXTENDED_1"] = 6] = "VM_OP_EXTENDED_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_EXTENDED_2"] = 7] = "VM_OP_EXTENDED_2"; vm_TeOpcode[vm_TeOpcode["VM_OP_EXTENDED_3"] = 8] = "VM_OP_EXTENDED_3"; vm_TeOpcode[vm_TeOpcode["VM_OP_CALL_5"] = 9] = "VM_OP_CALL_5"; vm_TeOpcode[vm_TeOpcode["VM_OP_DIVIDER_1"] = 10] = "VM_OP_DIVIDER_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_STORE_VAR_1"] = 10] = "VM_OP_STORE_VAR_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_STORE_SCOPED_1"] = 11] = "VM_OP_STORE_SCOPED_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_ARRAY_GET_1"] = 12] = "VM_OP_ARRAY_GET_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_ARRAY_SET_1"] = 13] = "VM_OP_ARRAY_SET_1"; vm_TeOpcode[vm_TeOpcode["VM_OP_NUM_OP"] = 14] = "VM_OP_NUM_OP"; vm_TeOpcode[vm_TeOpcode["VM_OP_BIT_OP"] = 15] = "VM_OP_BIT_OP"; vm_TeOpcode[vm_TeOpcode["VM_OP_END"] = 16] = "VM_OP_END"; })(vm_TeOpcode = exports.vm_TeOpcode || (exports.vm_TeOpcode = {})); ; var vm_TeOpcodeEx1; (function (vm_TeOpcodeEx1) { vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_RETURN"] = 0] = "VM_OP1_RETURN"; vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_THROW"] = 1] = "VM_OP1_THROW"; // (target) -> TsClosure vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_CLOSURE_NEW"] = 2] = "VM_OP1_CLOSURE_NEW"; // (TsClass, ...args) -> object vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_NEW"] = 3] = "VM_OP1_NEW"; vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_RESERVED_VIRTUAL_NEW"] = 4] = "VM_OP1_RESERVED_VIRTUAL_NEW"; vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_SCOPE_NEW"] = 5] = "VM_OP1_SCOPE_NEW"; // (value) -> mvm_TeType vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_TYPE_CODE_OF"] = 6] = "VM_OP1_TYPE_CODE_OF"; vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_POP"] = 7] = "VM_OP1_POP"; vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_TYPEOF"] = 8] = "VM_OP1_TYPEOF"; vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_OBJECT_NEW"] = 9] = "VM_OP1_OBJECT_NEW"; // boolean -> boolean vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_LOGICAL_NOT"] = 10] = "VM_OP1_LOGICAL_NOT"; vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_DIVIDER_1"] = 11] = "VM_OP1_DIVIDER_1"; // (object, prop) -> any vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_OBJECT_GET_1"] = 11] = "VM_OP1_OBJECT_GET_1"; // (string, string) -> string // (number, number) -> number vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_ADD"] = 12] = "VM_OP1_ADD"; // (any, any) -> boolean vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_EQUAL"] = 13] = "VM_OP1_EQUAL"; vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_NOT_EQUAL"] = 14] = "VM_OP1_NOT_EQUAL"; // (object, prop, any) -> void vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_OBJECT_SET_1"] = 15] = "VM_OP1_OBJECT_SET_1"; vm_TeOpcodeEx1[vm_TeOpcodeEx1["VM_OP1_END"] = 16] = "VM_OP1_END"; })(vm_TeOpcodeEx1 = exports.vm_TeOpcodeEx1 || (exports.vm_TeOpcodeEx1 = {})); ; // All of these operations are implemented with an 8-bit literal embedded into // the instruction. The literal is stored in reg1. var vm_TeOpcodeEx2; (function (vm_TeOpcodeEx2) { vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_BRANCH_1"] = 0] = "VM_OP2_BRANCH_1"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_STORE_ARG"] = 1] = "VM_OP2_STORE_ARG"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_STORE_SCOPED_2"] = 2] = "VM_OP2_STORE_SCOPED_2"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_STORE_VAR_2"] = 3] = "VM_OP2_STORE_VAR_2"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_ARRAY_GET_2_RESERVED"] = 4] = "VM_OP2_ARRAY_GET_2_RESERVED"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_ARRAY_SET_2_RESERVED"] = 5] = "VM_OP2_ARRAY_SET_2_RESERVED"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_DIVIDER_1"] = 6] = "VM_OP2_DIVIDER_1"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_JUMP_1"] = 6] = "VM_OP2_JUMP_1"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_CALL_HOST"] = 7] = "VM_OP2_CALL_HOST"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_CALL_3"] = 8] = "VM_OP2_CALL_3"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_CALL_6"] = 9] = "VM_OP2_CALL_6"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_LOAD_SCOPED_2"] = 10] = "VM_OP2_LOAD_SCOPED_2"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_LOAD_VAR_2"] = 11] = "VM_OP2_LOAD_VAR_2"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_LOAD_ARG_2"] = 12] = "VM_OP2_LOAD_ARG_2"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_EXTENDED_4"] = 13] = "VM_OP2_EXTENDED_4"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_ARRAY_NEW"] = 14] = "VM_OP2_ARRAY_NEW"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_FIXED_ARRAY_NEW_2"] = 15] = "VM_OP2_FIXED_ARRAY_NEW_2"; vm_TeOpcodeEx2[vm_TeOpcodeEx2["VM_OP2_END"] = 16] = "VM_OP2_END"; })(vm_TeOpcodeEx2 = exports.vm_TeOpcodeEx2 || (exports.vm_TeOpcodeEx2 = {})); ; // These instructions all have an embedded 16-bit literal value var vm_TeOpcodeEx3; (function (vm_TeOpcodeEx3) { // Note: Pop[0] can be used as a single-byte NOP instruction vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_POP_N"] = 0] = "VM_OP3_POP_N"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_SCOPE_DISCARD"] = 1] = "VM_OP3_SCOPE_DISCARD"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_SCOPE_CLONE"] = 2] = "VM_OP3_SCOPE_CLONE"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_AWAIT"] = 3] = "VM_OP3_AWAIT"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_AWAIT_CALL"] = 4] = "VM_OP3_AWAIT_CALL"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_ASYNC_RESUME"] = 5] = "VM_OP3_ASYNC_RESUME"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_RESERVED_3"] = 6] = "VM_OP3_RESERVED_3"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_DIVIDER_1"] = 7] = "VM_OP3_DIVIDER_1"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_JUMP_2"] = 7] = "VM_OP3_JUMP_2"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_LOAD_LITERAL"] = 8] = "VM_OP3_LOAD_LITERAL"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_LOAD_GLOBAL_3"] = 9] = "VM_OP3_LOAD_GLOBAL_3"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_LOAD_SCOPED_3"] = 10] = "VM_OP3_LOAD_SCOPED_3"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_DIVIDER_2"] = 11] = "VM_OP3_DIVIDER_2"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_BRANCH_2"] = 11] = "VM_OP3_BRANCH_2"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_STORE_GLOBAL_3"] = 12] = "VM_OP3_STORE_GLOBAL_3"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_STORE_SCOPED_3"] = 13] = "VM_OP3_STORE_SCOPED_3"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_OBJECT_GET_2"] = 14] = "VM_OP3_OBJECT_GET_2"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_OBJECT_SET_2"] = 15] = "VM_OP3_OBJECT_SET_2"; vm_TeOpcodeEx3[vm_TeOpcodeEx3["VM_OP3_END"] = 16] = "VM_OP3_END"; })(vm_TeOpcodeEx3 = exports.vm_TeOpcodeEx3 || (exports.vm_TeOpcodeEx3 = {})); ; // This is a bucket of less frequently used instructions that didn't fit into the other opcodes var vm_TeOpcodeEx4; (function (vm_TeOpcodeEx4) { vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_START_TRY"] = 0] = "VM_OP4_START_TRY"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_END_TRY"] = 1] = "VM_OP4_END_TRY"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_OBJECT_KEYS"] = 2] = "VM_OP4_OBJECT_KEYS"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_UINT8_ARRAY_NEW"] = 3] = "VM_OP4_UINT8_ARRAY_NEW"; // (constructor, props) -> TsClass vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_CLASS_CREATE"] = 4] = "VM_OP4_CLASS_CREATE"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_TYPE_CODE_OF"] = 5] = "VM_OP4_TYPE_CODE_OF"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_LOAD_REG_CLOSURE"] = 6] = "VM_OP4_LOAD_REG_CLOSURE"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_SCOPE_PUSH"] = 7] = "VM_OP4_SCOPE_PUSH"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_SCOPE_POP"] = 8] = "VM_OP4_SCOPE_POP"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_SCOPE_SAVE"] = 9] = "VM_OP4_SCOPE_SAVE"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_ASYNC_START"] = 10] = "VM_OP4_ASYNC_START"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_ASYNC_RETURN"] = 11] = "VM_OP4_ASYNC_RETURN"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_ENQUEUE_JOB"] = 12] = "VM_OP4_ENQUEUE_JOB"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_ASYNC_COMPLETE"] = 13] = "VM_OP4_ASYNC_COMPLETE"; vm_TeOpcodeEx4[vm_TeOpcodeEx4["VM_OP4_END"] = 14] = "VM_OP4_END"; })(vm_TeOpcodeEx4 = exports.vm_TeOpcodeEx4 || (exports.vm_TeOpcodeEx4 = {})); ; // Number operations. These are operations which take one or two arguments from // the stack and coerce them to numbers. Each of these will have two // implementations: one for 32-bit int, and one for 64-bit float. var vm_TeNumberOp; (function (vm_TeNumberOp) { // (number, number) -> boolean vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_LESS_THAN"] = 0] = "VM_NUM_OP_LESS_THAN"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_GREATER_THAN"] = 1] = "VM_NUM_OP_GREATER_THAN"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_LESS_EQUAL"] = 2] = "VM_NUM_OP_LESS_EQUAL"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_GREATER_EQUAL"] = 3] = "VM_NUM_OP_GREATER_EQUAL"; // (number, number) -> number vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_ADD_NUM"] = 4] = "VM_NUM_OP_ADD_NUM"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_SUBTRACT"] = 5] = "VM_NUM_OP_SUBTRACT"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_MULTIPLY"] = 6] = "VM_NUM_OP_MULTIPLY"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_DIVIDE"] = 7] = "VM_NUM_OP_DIVIDE"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_DIVIDE_AND_TRUNC"] = 8] = "VM_NUM_OP_DIVIDE_AND_TRUNC"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_REMAINDER"] = 9] = "VM_NUM_OP_REMAINDER"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_POWER"] = 10] = "VM_NUM_OP_POWER"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_DIVIDER"] = 11] = "VM_NUM_OP_DIVIDER"; // number -> number vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_NEGATE"] = 11] = "VM_NUM_OP_NEGATE"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_UNARY_PLUS"] = 12] = "VM_NUM_OP_UNARY_PLUS"; vm_TeNumberOp[vm_TeNumberOp["VM_NUM_OP_END"] = 13] = "VM_NUM_OP_END"; })(vm_TeNumberOp = exports.vm_TeNumberOp || (exports.vm_TeNumberOp = {})); ; // Bitwise operations: var vm_TeBitwiseOp; (function (vm_TeBitwiseOp) { // (bits, bits) -> bits vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_SHR_ARITHMETIC"] = 0] = "VM_BIT_OP_SHR_ARITHMETIC"; vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_SHR_LOGICAL"] = 1] = "VM_BIT_OP_SHR_LOGICAL"; vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_SHL"] = 2] = "VM_BIT_OP_SHL"; vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_END_OF_SHIFT_OPERATORS"] = 3] = "VM_BIT_OP_END_OF_SHIFT_OPERATORS"; vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_OR"] = 3] = "VM_BIT_OP_OR"; vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_AND"] = 4] = "VM_BIT_OP_AND"; vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_XOR"] = 5] = "VM_BIT_OP_XOR"; vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_DIVIDER_2"] = 6] = "VM_BIT_OP_DIVIDER_2"; // bits -> bits vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_NOT"] = 6] = "VM_BIT_OP_NOT"; vm_TeBitwiseOp[vm_TeBitwiseOp["VM_BIT_OP_END"] = 7] = "VM_BIT_OP_END"; })(vm_TeBitwiseOp = exports.vm_TeBitwiseOp || (exports.vm_TeBitwiseOp = {})); ; // 4-bit enum var vm_TeSmallLiteralValue; (function (vm_TeSmallLiteralValue) { vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_DELETED"] = 0] = "VM_SLV_DELETED"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_UNDEFINED"] = 1] = "VM_SLV_UNDEFINED"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_NULL"] = 2] = "VM_SLV_NULL"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_FALSE"] = 3] = "VM_SLV_FALSE"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_TRUE"] = 4] = "VM_SLV_TRUE"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_INT_MINUS_1"] = 5] = "VM_SLV_INT_MINUS_1"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_INT_0"] = 6] = "VM_SLV_INT_0"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_INT_1"] = 7] = "VM_SLV_INT_1"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_INT_2"] = 8] = "VM_SLV_INT_2"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_INT_3"] = 9] = "VM_SLV_INT_3"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_INT_4"] = 10] = "VM_SLV_INT_4"; vm_TeSmallLiteralValue[vm_TeSmallLiteralValue["VM_SLV_INT_5"] = 11] = "VM_SLV_INT_5"; })(vm_TeSmallLiteralValue = exports.vm_TeSmallLiteralValue || (exports.vm_TeSmallLiteralValue = {})); ; //# sourceMappingURL=bytecode-opcodes.js.map