disassembler-x86-intel
Version:
An Intel x86 disassembler, generates assembly from Opcode
18 lines (17 loc) • 850 B
JavaScript
"use strict";
Object.defineProperty(exports, "__esModule", { value: true });
exports.RCL_TABLE = void 0;
var hashMap_1 = require("../../helper/hashMap");
exports.RCL_TABLE = new hashMap_1.HashMap()
.set({ opcode: 'D0', modRm: '2' }, { operation: 'rcl', op1: 'm8', constant: '1' })
.set({ opcode: 'D2', modRm: '2' }, { operation: 'rcl', op1: 'm8', op2: 'cl', isRegisterIncluded: true })
.set({ opcode: 'C0', modRm: '2' }, { operation: 'rcl', op1: 'm8', op2: 'imm8' })
.set({ opcode: 'D1', modRm: '2' }, { operation: 'rcl', op1: 'm32', constant: '1', has16Bit: true })
.set({ opcode: 'D3', modRm: '2' }, {
operation: 'rcl',
op1: 'm32',
op2: 'cl',
isRegisterIncluded: true,
has16Bit: true,
})
.set({ opcode: 'C1', modRm: '2' }, { operation: 'rcl', op1: 'm32', op2: 'imm8', has16Bit: true });